get_design_hierarchy
Get module/instance hierarchy
How to use it
get_design_hierarchy is exposed by the Vivado MCP MCP server. Add the server to your MCP client (Claude Desktop, Cursor, Windsurf and others), and the get_design_hierarchy tool becomes available to the model automatically. See the full listing for setup details and every tool this server provides.
Install Vivado MCP
pip install -e .Other tools in Vivado MCP (36)
Add signal breakpoint
Add signals to waveform viewer
Close the current project
Close the simulator
Generate bitstream
Generate full reports to file
Search for cells/instances
Get clock information
Get synthesis/implementation messages
Search for nets
Get top-level ports
Get project information (part, directory, etc.)
List hierarchy scopes
Get a signal's current value
Get multiple signal values by pattern
List signals in a scope
Get current simulation time
Get detailed timing paths for failing/critical paths
Get timing summary (WNS, TNS, WHS, THS)
Get resource utilization (LUTs, FFs, BRAMs, DSPs)
Launch behavioral/post-synth/post-impl simulation
List submitted requests
Open a Vivado project (.xpr)
Read portions of large reports
Remove all breakpoints
Request new features
Restart from time 0
Run place and route
Run simulation for specified time
Run synthesis
Execute raw TCL commands
Get session statistics
Set the testbench module
Start a persistent Vivado TCL session
Step simulation
Stop the Vivado session